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February 2025 7 min read Research

ENI's 1,024-Channel Pipeline: Deterministic Spike Sorting in 800 µs

How the Embedded Neural Interface stack moves a thousand-electrode array through filtering, sorting, and decoding inside a single RTOS frame — and why the hardest part was not the math.

Why determinism matters more than throughput

A neural decoder that processes 1,024 channels in 800 µs on average but occasionally takes 2 ms is useless for closed-loop stimulation. The stimulator fires based on decoded intent; a missed deadline means the stimulus arrives after the neural event it was supposed to respond to. Determinism — guaranteed worst-case latency — is the hard constraint.

The frame

eNI processes neural data in 1 ms frames. Each frame contains 1,024 channels × 30 kHz × 16-bit = 61.44 MB/s of raw data. The pipeline runs in 800 µs, leaving 200 µs margin for the RTOS scheduler and eIPC transport. The pipeline stages are: bandpass filter (300–6000 Hz) → threshold detection → waveform extraction → PCA feature extraction → k-means cluster assignment → EIPC publish.

Memory bank scheduling

The RK3588S has 4 independent memory banks. The pipeline assigns each stage to a different bank to eliminate bank conflicts. The filter stage reads from bank 0 and writes to bank 1. The threshold stage reads from bank 1. The waveform extractor reads from bank 1 and writes to bank 2. This scheduling reduces memory latency by 40% compared to a single-bank layout.

Open data

The 1,024-channel test dataset (synthetic Poisson spike trains with realistic noise) is available on GitHub under CC-BY-4.0. The eNI pipeline benchmark harness is included in the eNI repository and runs on any EoS device with 8+ MB PSRAM.