Skip to content
December 2024 6 min read Engineering

EoSim 2.4 HIL Bridge: Virtual Peripherals Talking to Real Silicon

EoSim 2.4 introduces a bidirectional hardware-in-the-loop bridge: drive simulated EoS images from a real PHY, or drive real boards from a simulated MMIO bus.

What is HIL good for, anyway?

Hardware-in-the-loop testing connects a simulated firmware image to real physical hardware. The canonical use case: test a motor controller firmware image against a real motor driver IC, without flashing the firmware to a real MCU. This catches hardware-software interface bugs (wrong SPI clock polarity, missing pull-up) that pure simulation misses.

The ezbus protocol

EoSim 2.4 introduces ezbus, a lightweight USB protocol that bridges simulated MMIO registers to real hardware. A USB-connected ezbus adapter (based on the RP2040) exposes up to 16 virtual peripherals. The EoSim image writes to a simulated SPI register; ezbus translates the write to a real SPI transaction on the adapter's hardware SPI port.

Two directions

The bridge works in both directions. Direction 1 (sim → real): the EoSim image drives real hardware via ezbus. Direction 2 (real → sim): a real EoS board drives a simulated peripheral model in EoSim. Direction 2 is useful for testing sensor fusion algorithms: inject synthetic sensor data from EoSim into a real board running production firmware.

Performance

The ezbus adapter adds 180 µs of round-trip latency for a single SPI transaction. For most HIL use cases (motor control at 10 kHz, sensor reads at 1 kHz), this latency is acceptable. For sub-100 µs use cases (high-speed ADC, PWM generation), direct hardware testing is still required.